TSMC's Strategies for Amplifying ASML's EUV Tool Effectiveness: Enhancements at System Level and Domestic Pellicles - Chipmaker Surged EUV-Based Wafer Manufacture by 30 times over a Six-Year Period Whilst Lessening Power Consumption by 24%
TSMC (Taiwan Semiconductor Manufacturing Company) has been making significant strides in the field of extreme ultraviolet (EUV) lithography, a critical technology for manufacturing advanced semiconductors.
One of TSMC's key achievements is in planarization, where it has improved the process through advanced chemical mechanical planarization (CMP). By optimizing slurry chemistry, pressure profiles, and endpoint detection, TSMC has achieved tight within-wafer and wafer-to-wafer planarity control. This improvement is essential for maintaining focus and pattern fidelity at sub-2nm nodes, as seen in TSMC's A16 and A14 fabrication processes.
TSMC's efforts reflect a broader strategy to control the full EUV stack, from materials to tool optimization. The company plans to develop next-generation blank materials and new process flows to support future EUV requirements.
Improvements in CD uniformity, pattern fidelity, and overlay precision for curvilinear features have been achieved by modifying EUV mask blanks, increasing the resolution of multi-beam writers, and optimizing mask fabrication processes. TSMC has also improved mask accuracy and defect control for its photomasks, reducing defect density, boosting yield, and increasing throughput.
TSMC's supply chain for EUV lithography tools and raw materials is second to none, with the company controlling around 200 EUV machines globally, across many of its fabs. By mid-2024, TSMC had increased its market share of all EUV machines to 56%, with 130 machines in its possession.
The company's focus on EUV lithography technology has led to significant improvements. TSMC has made advancements in EUV pellicle technology, resulting in a four times longer lifespan, four and a half times more wafer output per pellicle, and an 80x reduction in defects. They have also reduced the power consumption of EUV tools by 24% through innovative energy-saving techniques.
TSMC's future target is a 1.5 times improvement in energy efficiency per wafer by 2030. The company has also deployed advanced e-beam inspection techniques to detect sub-visible membrane defects and degradation early, enabling predictive maintenance and proactive replacement before catastrophic failures. TSMC has strengthened its pellicle inspection, reticle cleanliness, and developer rinse chemistry to suppress defects like bridging and pattern collapse.
In May 2023, TSMC announced the plan to build a factory exclusively for EUV pellicles. As the largest operator of ASML's EUV lithography tools in the industry, TSMC has increased the throughput of its EUV scanners by over 30 times between 2019 and 2025, reducing downtime and service time.
TSMC may have upgraded its photoresist systems to high-sensitivity chemically amplified resists (CARs) and metal-oxide resists (MORs) to improve absorption at 13.5 nm wavelength. The company's requirements for EUV pellicles are extremely high, causing the company to retrofit one of its 200-mm fabs to produce proprietary EUV pellicles exclusively.
In summary, TSMC's advancements in EUV lithography have positioned the company as a leader in the semiconductor industry. With improvements in planarization, CD uniformity, mask accuracy, and energy efficiency, TSMC is pushing the boundaries of what is possible in semiconductor manufacturing. The company's continued investment in EUV technology is a testament to its commitment to innovation and its vision for the future of semiconductor manufacturing.
